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Author: joelcorley Big gold star, 5000 posts Old School Fool Add to my Favorite Fools Ignore this person (you won't see their posts anymore) Number: of 3855  
Subject: Re: IBM Nanotech news Date: 11/6/2012 2:56 PM
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rubberthinking,

You wrote, Pico is the atomic level its self...nano is a thousand picos......crystalline materials start at 20 nanometers.....

most or many engineers believe that real manufacturing on the nanometer scale will begin in ten years with developments allowing......but if we were to say things are made......are they made on the picometer scale? yes atoms are used.....

I dont really know what is made currently on the nanometer scale that really is not made on a larger scale....for instance the new Dream Liner Jet is made on the micro scale......and that is now considered futuristic.....

I would need more info on what is made on the nano scale to see what was going on currently....


The latest bleeding edge semiconductor fabrication processes used by Intel have minimum feature sizes of 22 nanometers. The next process step is supposed to be 14 nanometers in 2014.

The atomic radius of a single silicon atom (not SiO2) is 111pm, so the diameter (width) of a silicon atom is (about) 222pm. At 22nm, you only get enough room for a surface area of 10x10 silicon atoms in a crystalline lattice.

Ideally I'd prefer to call nano technology the placement of individual atoms. But when you can manipulate an area containing less than 100 atoms at a time ... well, that's pretty impressive too. And it's actually very close to theoretical limits. Transistors can't be made out of a single atom. You need at least a few to form a gate. Supposedly the smallest gate produced so far consists of 7 atoms. But of course we can't reproduce it with any cost effective manufacturing process today.

In fact, you should find it impressive that any optical lithography can produce features that small at all. After all visible light wave lengths are up in the hundreds of nanometers. Current feature sizes should require x-rays lithography, since the wave length of the light needs to be at least half the width of the feature. (I believe they actually use multiple masks instead and create an interference pattern. Even more impressive is that some EDA tool had to synthesize a mask set that when combined produces that precise interference pattern after each successive mask is exposed.)

- Joel
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